pp.36-39
Sandeep Kumar Singh1, Jitendra Prajapat2, Amit Asthana3
SITE, Swami Vivekananda Subharti University, Meerut
Abstract-The modern day computer has Limitations a significant Improvement in its performance and storage capacity and speed of Computation. However, Current processor cores and IBM SyNAPSE Neuromorphic chip are very differ in speed ,capacity, storage, power consumption ,etc. IBM has been work over this TrueNorth architecture technology and with the launching of SyNAPSE neurosynaptic chips, it has been open a new way of Process computations. This paper aims at viewing the various phases and researches that have been pointed in the overall development of IBM SyNAPSE neuromorphic chip using TrueNorth Architecture which has aims to developing electronic neuromorphic machine technology flexible brain like structure capable of performing wide range of real time computations that keeps less Power consumption and size factor in mind that scales level to Biological level. Inspired by the human brain, which is capable of performing complex tasks without being programmed and utilizing very less energy. The SyNAPSE neuromorphic chip uses of 256 programmable silicon leaky-integrate-and-fire neurons, 1024 × 256 crossbar synapses, and address-event representing communication circuits ,consuming only 45 pJ of active power per spike with a less power supply of 0.85 V, can be used in first stage of processing in low-power artificial chemical sensing devices inspired by natural olfactory systems.
Keywords- Neuromorphic chip, TrueNorth architecture, power consumption, Process computation, human brain
I. INTRODUCTION
IBM SyNAPSE Neuromorphic chip is a DARPA (Defense Advanced Research Projects Agency), an agency that is part of the U.S. Department of Defense funded program that based on human brain model of neurons that coordinate actions and transmits signals to and from different parts of its body. In the neuron system, a synapseis a structure that permits a neuron or neuron cell to pass an electrical or chemical signal to another neuron cell. The IBM SyNAPSE Neuromorphic chip built-in [1] 5.4-billion-transistor chip with 4096 neurosynaptic cores inter-connected via an intrachip network that integrates 1 million programmable spiking neurons and 256 million configurable synapses, Chips can be built-in two dimensions via an interchip communication interface, seamlessly scaling the architecture to a cortexlike sheet of arbitrary size. The architecture is well balanced to many applications that are using complex neural networks in real time, for example, multi object detection and classification. With 400-pixel-by-240-pixel video input at 30 frames per second, the chip consumes 70 milliwatts, information processing systems using electronic circuits and devices built-in using design principles that are based on biological neurons system. The circuits are type of designed using mixed-mode analog and digital Complementary Metal-Oxide-Semiconductor (CMOS) transistors and fabricated using standard Very Large Scale Integration (VLSI) designed processes,the biological systems that are model, IBM SyNAPSE neuromorphic chip systems are process information using energy-efficient asynchronous, event-driven.
I. WHAT IS TRUE NORTH?
TrueNorth is an architecture and neuromorphic CMOS chip developed by IBM. It uses 4096 hardware cores, each of simulating 256 programmable silicon “neurons” total of a million neurons. In IBM SyNAPSE Neuromorphic chip, each neuron has 256 programmable “synapses” which is gateway for the signals between them. [2] The total number of programmable synapses is 268 million .In basic term building blocks, its transistorcount is 5.4 billion. In this technology, computation,memory and communication are connected by each of the 4096 neurosynaptic cores, TrueNorth is use very less energy-efficient, consuming 70 milliwatts, about 1/10,000th the power density of conventional microprocessors.
A. FUNCTION
The IBM SyNAPSE Polymorphic Chip based on Human Brain, you can also say that inspired by Human Brain. The computational Architecture are similar to biological brain architecture. IBM SyNAPSE Polymorphic Chip is based Human brain four main and important function unit Neurons, Dendrite, Axon and Synapse. [3]
Neuron- Neurons are the fundamental units of the brain and nervous system, the cells having control over for receiving sensory input from the external source, for sending motor commands to our muscles, and transforming and relaying the electrical signals at every node in between.
Dendrite-The receiving part of the neuron, dendrites receive synaptic inputs from axons, with the sum total of dendrite inputs discovering and reported the neuron will process to an action potential.
Axon-The long, thin structure in which action potentials are generated; the transmitting part of the neuron. After initiation, action potentials travel down axons to release of neurotransmitter. Synapse- The junction between the axon of one neuron and the dendrite of another, through which the two neurons communicate.
A. Technology Area
The IBM SyNAPSE Polymorphic Chip project will be an approach that can coordinate four technology area development activities are following: hardware; architecture; simulation; and environment. [5]
Hardware – implementation will possible include CMOS devices, novel synaptic components, and combinations of hard-wired and programmable/virtual connectivity. These will support information processing techniques is inspired from biological systems, such as spike encoding and spike timing dependent plasticity.
Architecture –These will support critical structures and functions declare in biological systems such as connectivity, core component of system circuitry, hierarchical organization, competitive self-organization, and modulator reinforcement systems. As used in biological systems, processing will be necessarily be maximally distributed, nonlinear, and inherently noise- and defect-tolerant.
Simulation –These will support large-scale digital simulations of circuits and systems will be used to establish the relationship component and all part of system functionality and to inform overall system development in advance of neuromorphic hardware implementation.
Environment –These will support critical evolving, virtual platforms for the training, evaluation and benchmarking of intelligent machines in all of gateway of perception, cognition, and response.
B. Key points of Integrated SyNAPSE Technology
Supercomputer Simulations
Neuroscience Data
Simulation with 100 trillion synapses
Neurosynaptic Core
Architecture: A Network of Neurosynaptic Cores, Neuron Model
Programming Model, End to end cognitive Ecosystem
Algorithms and Applications
Conceptual Models of Cognitive Syste
1. COLLABORATORS
This following organizations and agency are collaboration with the DARPA (Defense Advanced Research Projects Agency), SyNAPSE Neuromorphic Chip project. The main two organizations are IBM and HRL. These names of universities and companies are pointed in this paper [6].
DARPA – program managed and hosted by Gill Pratt
IBM Research – Cognitive Computing group hosted by DharmendraModha
Cornell University – Asynchronous VLSI circuit design, the neurosynaptic core, hosted by RajitManohar.
University of California, Merced – environment research, hosted by Christopher Kello
University of Wisconsin-Madison – Simulation, theory of consciousness, computer models, hosted by GiulioTononi.
Columbia University Medical Center – Theoretical neuroscience research, development of neural network models, hosted by Stefano Fusi.
HRL Laboratories – Memristor-based processor development hosted by Narayan Srinivasa ,Organization names and Members are following:
Boston University: Stephen Grossberg, Gail Carpenter, Yongqiang Cao, Praveen Pilly
George Mason University: Giorgio Ascoli, Alexei Samsonovich
Stanford University: Mark Schnitzer
Set Corporation: Chris Long
University of California-Irvine: Jeff Krichmar
Portland State University: ChristofTeuscher
The Neurosciences Institute: Gerald Edelman, Einar Gall, Jason Fleischer
University of Michigan: Wei Lu
II. FORMERCOLLABORATORS:
HP Labs – a participant in phase 0 of the program but was dropped for upcoming phases. Research technique continues into memristor development, plus the Cog Ex
Machine intelligent systems project which is hosted by Greg Snider.
Neuromorphics Lab- at Boston University – hosted by Massimiliano designed and sub-contracted by HP during phase 0. Continues project to receive funding from HP but independent of any DARPA support. The project is called MoNETA – an artificial like brain system.
III. FUNDING
All funding for the IBM SyNAPSE Neuromorphic Chip project comes from DARPA(Defense Advanced Research Projects Agency). Total funding per financial year (FINANCIAL YEAR) is as follows. The US government financial years begin on October 1 of the previous year. So financial years 2013 runs from October 1, 2012 to September 30, 2013. The budgets are published in advance each year in February, so the financial years 2014 budget is due to be published in February 2013.
FINANCIAL YEAR 2008 – Rs.0 (project started October 2008, i.e. start of FINANCIAL YEAR 2009)
FINANCIAL YEAR 2009 – Rs. 198629719.77
FINANCIAL YEAR 2010 – Rs.1127223659.71
FINANCIAL YEAR 2011 – Rs.1827923101.17
FINANCIAL YEAR 2012 – Rs.2052507104.32
FINANCIAL YEAR 2013 – Rs.1589037758.19
Total: Rs. 6798456104.8500
From the above funds, awards were made to IBM and HRL as follows:
IV. TIMELINE
2007 Apr – Todd Hylton joins in DARPA to found
2008 Apr – DARPA publishes is a request for applications for project May – Due date for initial recommendation for the project Oct – Winning contractors announced from DARPA Nov – Phase 0 start
2009 Sep – Phase 1 started Nov – Statement of project cat-scale brain simulation
2010, 2011 Aug – Statement of project neuromorphic chip implementation from DARPA Sep – Phase 2 start Dec – Statement of project first memristor chip from DARPA
2012 Feb – Todd Hylton left from DARPA, Gill Pratt takes over as program manager May – Neuromorphic architecture design published Nov – TrueNorth/Compass simulation of 530 billion neurons announced in this project
2013 Feb – Expected announcement of multi-core neurosynaptic chips (1 million neurons per chip)
Mar – Phase 3 to begin (estimated date)
2014 Oct – Phase 4 to begin (estimated date)
2015, 2016 – Program end
V. CONCLUSION
In this research paper present an information survey about of IBM SyNAPSE Neuromorphic Chip architecture system that that is inspired of Human brain Architecture. And also research about SyNAPSE Neuromorphic chip and others Specification, Power density, Project features, Analog or Digital, Manufacturing process, largest current configuration, Next configuration, and Final configuration. The Organization and Agencies are collaboration with the DARPA for SyNAPSE Neuromorphic Chip project this paper has pointed Main organizations, Former collaborations, and funding plans of timeline.
REFERENCES
1. Paul A. Merolla @ “ A million spiking-neuron integrated circuit with a scalable communication network and interface
2. TrueNorth From Wikipedia https://en.wikipedia.org/wiki/TrueNorth
3. Alan Woodruff “Neuroscience Basic”
http://www.qbi.uq.edu.au/content/neuroscience-basics-%E2%80%93-neurons-action-potentials-and-synapses
4. Giacomo Indiveri And Shih-Chii Lui “ Memory and Information Processing in neuromorphic system “
5. http://www.artificialbrains.com/darpa-synapse-program
6. http://www.artificialbrains.com/darpa-synapse-program